STANDARD

Search by standard title Search by standard number

View cartView cart

Electronic Devices Standardization
Semiconductor Device Packages

No. Title Issue Date Stabilized Former No.
Remarks
Price (Yen)
ED-7300A BRecommended practice on standard for the preparation of outline drawings of semiconductor packages 1997.08
2008.01 
2013.12  ED-7401A
ED-7300
 
¥5,657
ED-7301A BManual for preparation of individual standards of integrated circuits packages 1996.12
2007.03 
2013.12  ED-7301
 
¥3,143
ED-7302A BManual for preparation of design guides of integrated circuits packages 1997.04
2007.03 
2013.12  ED-7401-1
ED-7302
 
¥3,562
ED-7303C BName and code for integrated circuits package 1998.06
2001.03
2002.04
2008.03 
  ED-7303A
 
¥3,982
ED-7304 BMeasuring method for package dimensions of ball grid array (BGA) 1997.05  2014.03    ¥5,867
ED-7304-1 BMeasuring method for package dimensions of Small Outline Package (SOP) 1997.03  2014.03    ¥4,400
ED-7305A BUnit Design Guide for the Preparation of Package Outline Drawing of Integrated Circuits (Gullwing-Lead) 1997.04
2012.04 
  ED-7305
 
¥2,514
ED-7306 BMeasurement methods of package warpage at elevated temperature and the maximum permissible warpage 2007.03      ¥5,029
ED-7311-1 BStandard of integrated circuits package (TSOP(1)) 1997.08      ¥2,619
ED-7311-10A BStandard of integrated circuits package (P-BGA (Cavity down type)) 1998.03
1998.11 
  ED-7311-10
 
¥6,810
ED-7311-11A BStandard of integrated circuits package (119/153pins P-BGA) 1998.03
1998.11 
  ED-7311-11
 
¥1,991
ED-7311-12 BStandard of integrated circuits package (52pins 64pins 80pins and 100pins Low-profile Quad Flat Package with Exposed Heatsink) 1998.08      ¥2,305
ED-7311-13A BStandard of Integrated circuits package (P-SON) 1999.01
2002.06 
  ED-7311-13
 
¥2,933
ED-7311-16A BStandard of integrated circuits package (C-LGA) 2000.06
2003.11 
  ED-7311-14
ED-7311-15
ED-7311-16
 
¥8,171
ED-7311-17 BStandard of integrated circuits package (P-ZIP) 2001.06      ¥2,724
ED-7311-18 BStandard of integrated circuits package (P-ILGA) 2002.03      ¥2,514
ED-7311-19 BStandard of integrated circuits package (P-SOP) 2002.01      ¥9,848
ED-7311-2 BStandard of integrated circuits package (TSOP(2)) 1997.08      ¥3,248
ED-7311-20 BStandard of integrated circuits package (P-SSOP) 2002.01      ¥14,667
ED-7311-21 BStandard of integrated circuits package (P-HSOP) 2002.03      ¥5,238
ED-7311-22 BStandards of integrated circuits package (P-QFN) 2002.04      ¥6,705
ED-7311-23 BStandard of Integrated circuits package (PGA) 2002.06      ¥7,124
ED-7311-3A BStandard of integrated circuits package (Tape Ball Grid Array1.0mm pitch(T-BGA)) 1997.08
1999.04 
  ED-7311-3
 
¥5,133
ED-7311-4A BStandard of integrated circuits package (Tape Ball Grid Array1.27mm pitch (T-BGA)) 1997.08
1999.04 
  ED-7311-4
 
¥2,619
ED-7311-5A BStandard of integrated circuits package (SRAM/Flash Fine- Pitch Ball Grid Array (FBGA)) 1998.04
2000.02 
  ED-7311-5
 
¥2,410
ED-7311-6 BStandard of integrated circuits package (60/90pins Fine Pitch Ball Grid Array (FBGA)) 1998.04      ¥1,991
ED-7311-7 BStandard of integrated circuits package (Plastic Fine Pitch Ball Grid Array 0.5mm pitch (P-FBGA)) 1998.05      ¥9,638
ED-7311-8 BStandard of integrated circuits package (Plastic Fine Pitch Ball Grid Array 0.8mm pitch (P-FBGA)) 1998.05      ¥7,229
ED-7311-9A BStandard of integrated circuits package (P-BGA (cavity up type)) 1998.03
1998.11 
  ED-7311-9
 
¥7,438
ED-7311A BStandards of integrated circuits package (P-QFP) 1997.05
2002.04 
  ED-7311
 
¥11,105
ED-7316 BDesign guide for semiconductor packages Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA and FLGA) 2008.09      ¥6,076
ED-7318 BDesign guideline of integrated circuits for Plastic Small Outline No-lead package (P-SON) 2013.03    EDR-7318A
 
¥3,982
ED-7324 BDesign guideline of integrated circuits for Plastic Quad Flat Non-leaded package (P-QFN) 2012.02    EDR-7324A
 
¥4,610
ED-7335 BDesign guide for semiconductor packages Silicon Fine-pitch Ball Grid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA) 2010.02      ¥4,400
ED-7401-4 BMethod of measuring semiconductor device package dimensions (integrated circuits) 1995.05  2014.03    ¥4,819
ED-7500B BStandard Outlines of Semiconductor Devices(Discrete Semiconductor Devices) 1990.09
1996.07
2015.03 
  ED-7500
ED-7500A
ED-7500A-1
ED-7500A-2
ED-7500A-3
 
¥19,800
ED-7502A BManual for the preparation of outline drawings of discrete semiconductor packages 2006.06
2013.03 
  ED-7502
 
¥6,286
ED-7607 JMatrix fixed trays design guide 2017.05      ¥2,090
ED-7617 BMatrix trays design guide 2013.12      ¥7,962
ED-7618 JTerms and definitions for semiconductor packing 2017.06      ¥2,420
ED-7631 BMarking method for recycle of semiconductor device packing magazines 2001.01
 
    ¥2,305
ED-7701A BGlossary of semiconductor socket for BGA,LGA,FBGA and FLGA 1999.08
2012.03 
  ED-7701
 
¥2,933
ED-7702A BTest Methods for Test and Burn-In Socket 2003.09
2012.03 
  ED-7702
 
¥10,057
ED-7711 BDesign guideline of open-top type socket for Ball Grid Array(BGA) 2014.10      ¥4,840
ED-7712 BDesign guideline of open-top type socket for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array(FBGA/FLGA) 2013.03      ¥4,819
ED-7713 BDesign guideline of clamshell type socket for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array(FBGA/FLGA) 2013.03      ¥4,610
ED-7714 BDesign guideline of clamshell type socket for Ball Grid Array and Land Grid Array(BGA/LGA) 2014.10      ¥4,840
ED-7715 BStandard of open-top type socket [54/66 Pin Thin Small Outline Packages (Type 2)] 2006.03      ¥2,305
ED-7716 BStandard of open-top type socket [Fine-pitch Ball Grid Array (FBGA) for Memort IC] 2006.03      ¥2,410
ED-7800 JTransient thermal network model for semiconductor packages(Discrete semiconductor) 2018.06      ¥3,850
ED-7801 JPrinted circuit board specifications to evaluate thermal characteristics of fine pitch semiconductor packages 2018.06      ¥3,300
ED-7803 JJEITA Thermally Accurate Model 2020.02      ¥3,740
ED-7804 JOverview of transient thermal DXRC model 2022.10      ¥1,980
ED-7805 JDXRC model for semiconductor packages (Discrete semiconductor) 2022.10      ¥2,090
ED-7806 JDNRC model for semiconductor packages (Discrete semiconductor) 2023.04      ¥2,541
ED-7807 JDSRC model for semiconductor packages (Discrete semiconductor) 2023.04      ¥2,541
EDR-7311A BDesign guideline of integrated circuits for Plastic Quad Flat Package (P-QFP) 1996.04
2002.04 
  ED-7404A
EDR-7311
 
¥6,495
EDR-7312 BDesign guideline of integrated circuits for thin small outline package (type1) (TSOPI) 1996.04    ED-7402-3
 
¥3,982
EDR-7313 BDesign guideline of integrated circuits for thin small outline package (type 2) (TSOP2) 1996.04    ED-7402-4A
 
¥4,191
EDR-7314A BDesign guideline of integrated circuits for Plastic Shrink Small Outline Package (P-SSOP) 1996.08
2002.01 
  ED-7402-2A
EDR-7314
 
¥6,076
EDR-7315B BDesign guide for semiconductor packages Ball Grid Array (BGA) 1997.05
1998.11
2006.03 
  EDR-7315A
 
¥4,819
EDR-7317 BDesign guideline of integrated circuits for Surface Vertical Package (SVP) 1998.05    ED-7424
 
¥3,352
EDR-7319 BDesign guideline of integrated circuits for Quad Flat J-Lead Packages (QFJ) 1998.12    ED-7407
 
¥4,819
EDR-7320 BDesign guideline of integrated circuits for Small Outline Package (SOP) 1998.12    ED-7402-1
 
¥3,143
EDR-7321 BDesign guideline of integrated circuits for Quad Flat I-lead package (QFI) 1999.02    ED-7409
 
¥3,143
EDR-7322 BDesign guideline of integrated circuits for Plastic Dual Inline Package (DIP) 1999.04    ED-7403-1
 
¥4,400
EDR-7323A BDesign guideline of integrated circuits for Pin Grid Array (PGA) 1999.05
2002.06 
  EDR-7323
 
¥6,495
EDR-7325 BDesign guideline of integrated circuits for Quad Flat Non-leaded packages (QFN) 1999.05    ED-7412
 
¥3,982
EDR-7326A BDesign guideline of integrated circuits for Plastic Small Outline Package with Heat sink (P-HSOP) 1999.12
2002.03 
  ED-7415
EDR-7326
 
¥6,705
EDR-7327 BDesign guideline of integrated circuits for Single Inline Package (SIP) 2001.01    ED-7413
 
¥3,352
EDR-7328 BDesign guideline of integrated circuits for Plastic Zigzag Inline Package (P-ZIP) 2001.09    ED-7405
ED-7405-1
 
¥4,400
EDR-7329 BDesign guideline of integrated circuits for Plastic Interstitial Land Grid Array package (P-ILGA) 2002.03      ¥5,029
EDR-7330 BDesign guideline of integrated circuits for Plastic Small Outline J-Lead package (P-SOJ) 2002.06      ¥7,124
EDR-7331 BDesign guideline of integrated circuits for Quad Tape Carrier packages and Carrier (QTP and Carrier) 2002.09    ED-7431A
ED-7431-1A
 
¥9,848
EDR-7332 BDesign guideline of integrated circuits for Dual Tape Carrier packages (TYPE1, TYPE2) (DTP(1), DTP(2)) 2002.09    ED-7432
ED-7433
 
¥7,752
EDR-7333 BDesign Guide for Stacked Packages Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (P-PFBGA and P-PFLGA) 2008.05      ¥6,495
EDR-7334 BEvaluation results of typical measurement methods of temperature dependent warpage 2008.05      ¥3,771
EDR-7335 EGlossary for Semiconductor packages (Volum 1:Semiconductor package name and parts name) 2011.09      ¥0
EDR-7335 JGlossary for Semiconductor packages (Volume 1: Semiconductor package name and parts name) 2010.11      ¥2,724
EDR-7336 EPackage thermal characteristics guideline in semiconductor products 2014.01      ¥0
EDR-7336 JPackage thermal characteristic guideline in semiconductor product 2010.10      ¥3,771
EDR-7337 EThermal characteristics guidelines of two chip stacked semiconductor packages 2015.03      ¥0
EDR-7337 JThermal characteristics guidelines of two chip stacked semiconductor packages 2013.10      ¥0
EDR-7338 JTemperature measurement guideline using a thermocouple 2016.02      ¥0
EDR-7339 JGuideline for package thermal characteristic of power semiconductor module 2022.03      ¥8,470
EDR-7402 JLow Cl and Br Molding Compound 2021.11      ¥0
EDR-7605 BMarking guideline of packing for lead-free semiconductor device 2004.01      ¥2,095
EDR-7619 JSupplying reel of embossed carrier tape for semiconductor devices 2013.12      ¥0
EDR-7714 BDesign guideline of clamshell type socket for Ball Grid Array and Land Grid array(BGA/LGA) 2008.03      ¥4,610
EDR-7717 JPositioning simulation of semiconductor sockets Technical reports 2010.03      ¥3,143
EDR-7718 JPositioning simulation of semiconductor sockets Technical reports(Socket type FBGA) 2011.04     The reading system does not support this standard. ¥0
EDR-7719 JPositioning simulation of semiconductor sockets Technical reports [Socket type QFP] 2014.10      ¥3,190
EDX-7311-24 BMeasurement methods and maximum warpage allowance for soldering stacked packages at elevated temperature 2008.05      ¥3,562