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JEITA Standards
Order Summary
Electronic Devices Standardization
Semiconductor Device Packages
Please read first JapaneseJapanese EnglishEnglish Both Japanese & EnglishBoth Japanese & English StabilizedStabilized
Order
NO.
Title
Issue
Date
Price
(Yen)
Former No.
Remarks
Stabilized
  ED-7300A Both Japanese & English Recommended practice on standard for the preparation of outline drawings of semiconductor packages 1997.08
2008.01
 5,657 ED-7401A
ED-7300
Stabilized
2013.12
  ED-7301A Both Japanese & English Manual for preparation of individual standards of integrated circuits packages 1996.12
2007.03
 3,143 ED-7301
Stabilized
2013.12
  ED-7302A Both Japanese & English Manual for preparation of design guides of integrated circuits packages 1997.04
2007.03
 3,562 ED-7401-1
ED-7302
Stabilized
2013.12
  ED-7303C Both Japanese & English Name and code for integrated circuits package 1998.06
2001.03
2002.04
2008.03
 3,982 ED-7303A

  ED-7304 Both Japanese & English Measuring method for package dimensions of ball grid array (BGA) 1997.05  5,867 Stabilized
2014.03
  ED-7304-1 Both Japanese & English Measuring method for package dimensions of Small Outline Package (SOP) 1997.03  4,400 Stabilized
2014.03
  ED-7305A Both Japanese & English Unit Design Guide for the Preparation of Package Outline Drawing of Integrated Circuits (Gullwing-Lead) 1997.04
2012.04
 2,514 ED-7305

  ED-7306 Both Japanese & English Measurement methods of package warpage at elevated temperature and the maximum permissible warpage 2007.03  5,029
  ED-7311-1 Both Japanese & English Standard of integrated circuits package (TSOP(1)) 1997.08  2,619
  ED-7311-10A Both Japanese & English Standard of integrated circuits package (P-BGA (Cavity down type)) 1998.03
1998.11
 6,810 ED-7311-10

  ED-7311-11A Both Japanese & English Standard of integrated circuits package (119/153pins P-BGA) 1998.03
1998.11
 1,991 ED-7311-11

  ED-7311-12 Both Japanese & English Standard of integrated circuits package (52pins 64pins 80pins and 100pins Low-profile Quad Flat Package with Exposed Heatsink) 1998.08  2,305
  ED-7311-13A Both Japanese & English Standard of Integrated circuits package (P-SON) 1999.01
2002.06
 2,933 ED-7311-13

  ED-7311-16A Both Japanese & English Standard of integrated circuits package (C-LGA) 2000.06
2003.11
 8,171 ED-7311-14
ED-7311-15
ED-7311-16

  ED-7311-17 Both Japanese & English Standard of integrated circuits package (P-ZIP) 2001.06  2,724
  ED-7311-18 Both Japanese & English Standard of integrated circuits package (P-ILGA) 2002.03  2,514
  ED-7311-19 Both Japanese & English Standard of integrated circuits package (P-SOP) 2002.01  9,848
  ED-7311-2 Both Japanese & English Standard of integrated circuits package (TSOP(2)) 1997.08  3,248
  ED-7311-20 Both Japanese & English Standard of integrated circuits package (P-SSOP) 2002.01  14,667
  ED-7311-21 Both Japanese & English Standard of integrated circuits package (P-HSOP) 2002.03  5,238
  ED-7311-22 Both Japanese & English Standards of integrated circuits package (P-QFN) 2002.04  6,705
  ED-7311-23 Both Japanese & English Standard of Integrated circuits package (PGA) 2002.06  7,124
  ED-7311-3A Both Japanese & English Standard of integrated circuits package (Tape Ball Grid Array1.0mm pitch(T-BGA)) 1997.08
1999.04
 5,133 ED-7311-3

  ED-7311-4A Both Japanese & English Standard of integrated circuits package (Tape Ball Grid Array1.27mm pitch (T-BGA)) 1997.08
1999.04
 2,619 ED-7311-4

  ED-7311-5A Both Japanese & English Standard of integrated circuits package (SRAM/Flash Fine- Pitch Ball Grid Array (FBGA)) 1998.04
2000.02
 2,410 ED-7311-5

  ED-7311-6 Both Japanese & English Standard of integrated circuits package (60/90pins Fine Pitch Ball Grid Array (FBGA)) 1998.04  1,991
  ED-7311-7 Both Japanese & English Standard of integrated circuits package (Plastic Fine Pitch Ball Grid Array 0.5mm pitch (P-FBGA)) 1998.05  9,638
  ED-7311-8 Both Japanese & English Standard of integrated circuits package (Plastic Fine Pitch Ball Grid Array 0.8mm pitch (P-FBGA)) 1998.05  7,229
  ED-7311-9A Both Japanese & English Standard of integrated circuits package (P-BGA (cavity up type)) 1998.03
1998.11
 7,438 ED-7311-9

  ED-7311A Both Japanese & English Standards of integrated circuits package (P-QFP) 1997.05
2002.04
 11,105 ED-7311

  ED-7316 Both Japanese & English Design guide for semiconductor packages Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA and FLGA) 2008.09  6,076
  ED-7318 Both Japanese & English Design guideline of integrated circuits for Plastic Small Outline No-lead package (P-SON) 2013.03  3,982 EDR-7318A

  ED-7324 Both Japanese & English Design guideline of integrated circuits for Plastic Quad Flat Non-leaded package (P-QFN) 2012.02  4,610 EDR-7324A

  ED-7335 Both Japanese & English Design guide for semiconductor packages Silicon Fine-pitch Ball Grid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA) 2010.02  4,400
  ED-7401-4 Both Japanese & English Method of measuring semiconductor device package dimensions (integrated circuits) 1995.05  4,819 Stabilized
2014.03
  ED-7500B Both Japanese & English Standard Outlines of Semiconductor Devices(Discrete Semiconductor Devices) 1990.09
1996.07
2015.03
 19,800 ED-7500
ED-7500A
ED-7500A-1
ED-7500A-2
ED-7500A-3

  ED-7502A Both Japanese & English Manual for the preparation of outline drawings of discrete semiconductor packages 2006.06
2013.03
 6,286 ED-7502

  ED-7607 Japanese Matrix fixed trays design guide 2017.05  2,090
  ED-7617 Both Japanese & English Matrix trays design guide 2013.12  7,962
  ED-7618 Japanese Terms and definitions for semiconductor packing 2017.06  2,420
  ED-7631 Both Japanese & English Marking method for recycle of semiconductor device packing magazines 2001.01
 2,305
  ED-7701A Both Japanese & English Glossary of semiconductor socket for BGA,LGA,FBGA and FLGA 1999.08
2012.03
 2,933 ED-7701

  ED-7702A Both Japanese & English Test Methods for Test and Burn-In Socket 2003.09
2012.03
 10,057 ED-7702

  ED-7711 Both Japanese & English Design guideline of open-top type socket for Ball Grid Array(BGA) 2014.10  4,840
  ED-7712 Both Japanese & English Design guideline of open-top type socket for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array(FBGA/FLGA) 2013.03  4,819
  ED-7713 Both Japanese & English Design guideline of clamshell type socket for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array(FBGA/FLGA) 2013.03  4,610
  ED-7714 Both Japanese & English Design guideline of clamshell type socket for Ball Grid Array and Land Grid Array(BGA/LGA) 2014.10  4,840
  ED-7715 Both Japanese & English Standard of open-top type socket [54/66 Pin Thin Small Outline Packages (Type 2)] 2006.03  2,305
  ED-7716 Both Japanese & English Standard of open-top type socket [Fine-pitch Ball Grid Array (FBGA) for Memort IC] 2006.03  2,410
  ED-7800 Japanese Transient thermal network model for semiconductor packages(Discrete semiconductor) 2018.06  3,850
  ED-7801 Japanese Printed circuit board specifications to evaluate thermal characteristics of fine pitch semiconductor packages 2018.06  3,300
  ED-7803 Japanese JEITA Thermally Accurate Model 2020.02  3,740
  EDR-7311A Both Japanese & English Design guideline of integrated circuits for Plastic Quad Flat Package (P-QFP) 1996.04
2002.04
 6,495 ED-7404A
EDR-7311

  EDR-7312 Both Japanese & English Design guideline of integrated circuits for thin small outline package (type1) (TSOPI) 1996.04  3,982 ED-7402-3

  EDR-7313 Both Japanese & English Design guideline of integrated circuits for thin small outline package (type 2) (TSOP2) 1996.04  4,191 ED-7402-4A

  EDR-7314A Both Japanese & English Design guideline of integrated circuits for Plastic Shrink Small Outline Package (P-SSOP) 1996.08
2002.01
 6,076 ED-7402-2A
EDR-7314

  EDR-7315B Both Japanese & English Design guide for semiconductor packages Ball Grid Array (BGA) 1997.05
1998.11
2006.03
 4,819 EDR-7315A

  EDR-7317 Both Japanese & English Design guideline of integrated circuits for Surface Vertical Package (SVP) 1998.05  3,352 ED-7424

  EDR-7319 Both Japanese & English Design guideline of integrated circuits for Quad Flat J-Lead Packages (QFJ) 1998.12  4,819 ED-7407

  EDR-7320 Both Japanese & English Design guideline of integrated circuits for Small Outline Package (SOP) 1998.12  3,143 ED-7402-1

  EDR-7321 Both Japanese & English Design guideline of integrated circuits for Quad Flat I-lead package (QFI) 1999.02  3,143 ED-7409

  EDR-7322 Both Japanese & English Design guideline of integrated circuits for Plastic Dual Inline Package (DIP) 1999.04  4,400 ED-7403-1

  EDR-7323A Both Japanese & English Design guideline of integrated circuits for Pin Grid Array (PGA) 1999.05
2002.06
 6,495 EDR-7323

  EDR-7325 Both Japanese & English Design guideline of integrated circuits for Quad Flat Non-leaded packages (QFN) 1999.05  3,982 ED-7412

  EDR-7326A Both Japanese & English Design guideline of integrated circuits for Plastic Small Outline Package with Heat sink (P-HSOP) 1999.12
2002.03
 6,705 ED-7415
EDR-7326

  EDR-7327 Both Japanese & English Design guideline of integrated circuits for Single Inline Package (SIP) 2001.01  3,352 ED-7413

  EDR-7328 Both Japanese & English Design guideline of integrated circuits for Plastic Zigzag Inline Package (P-ZIP) 2001.09  4,400 ED-7405
ED-7405-1

  EDR-7329 Both Japanese & English Design guideline of integrated circuits for Plastic Interstitial Land Grid Array package (P-ILGA) 2002.03  5,029
  EDR-7330 Both Japanese & English Design guideline of integrated circuits for Plastic Small Outline J-Lead package (P-SOJ) 2002.06  7,124
  EDR-7331 Both Japanese & English Design guideline of integrated circuits for Quad Tape Carrier packages and Carrier (QTP and Carrier) 2002.09  9,848 ED-7431A
ED-7431-1A

  EDR-7332 Both Japanese & English Design guideline of integrated circuits for Dual Tape Carrier packages (TYPE1, TYPE2) (DTP(1), DTP(2)) 2002.09  7,752 ED-7432
ED-7433

  EDR-7333 Both Japanese & English Design Guide for Stacked Packages Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (P-PFBGA and P-PFLGA) 2008.05  6,495
  EDR-7334 Both Japanese & English Evaluation results of typical measurement methods of temperature dependent warpage 2008.05  3,771
  EDR-7335 English Glossary for Semiconductor packages (Volum 1:Semiconductor package name and parts name) 2011.09  0
  EDR-7335 Japanese Glossary for Semiconductor packages (Volume 1: Semiconductor package name and parts name) 2010.11  2,724
  EDR-7336 English Package thermal characteristics guideline in semiconductor products 2014.01  0
  EDR-7336 Japanese Package thermal characteristic guideline in semiconductor product 2010.10  3,771
  EDR-7337 English Thermal characteristics guidelines of two chip stacked semiconductor packages 2015.03  0
  EDR-7337 Japanese Thermal characteristics guidelines of two chip stacked semiconductor packages 2013.10  0
  EDR-7338 Japanese Temperature measurement guideline using a thermocouple 2016.02  0
  EDR-7605 Both Japanese & English Marking guideline of packing for lead-free semiconductor device 2004.01  2,095
  EDR-7619 Japanese Supplying reel of embossed carrier tape@for semiconductor devices 2013.12  0
  EDR-7714 Both Japanese & English Design guideline of clamshell type socket for Ball Grid Array and Land Grid array(BGA/LGA) 2008.03  4,610
  EDR-7717 Japanese Positioning simulation of semiconductor sockets Technical reports 2010.03  3,143
  EDR-7718 Japanese Positioning simulation of semiconductor sockets Technical reports(Socket type FBGA) 2011.04  0 The reading system does not support this standard.
  EDR-7719 Japanese Positioning simulation of semiconductor sockets Technical reports [Socket type QFP] 2014.10  3,190
  EDX-7311-24 Both Japanese & English Measurement methods and maximum warpage allowance for soldering stacked packages at elevated temperature 2008.05  3,562
 
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